Samsung Prepares DRAM‑Free PCIe 4.0 SSD Using HMB to Counter Rising Memory Costs

• Samsung is developing a DRAM‑free PCIe 4.0 SSD that still delivers flagship‑level read performance
• Host Memory Buffer (HMB) will substitute for dedicated DRAM in the upcoming budget SSD
• Leaked specifications show sequential read speeds of up to 7,150 MB/s

Samsung appears to be preparing a budget PCIe 4.0 NVMe SSD that omits the traditional DRAM cache.

The unannounced model briefly surfaced on Samsung’s website before being removed without any official confirmation.

Listed specifications describe a 1TB drive with sequential read speeds reaching 7,150 MB/s and write speeds reaching 6,450 MB/s.

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Samsung Prepares DRAM‑Free PCIe 4.0 SSD Using HMB to Counter Rising Memory Costs

Without dedicated DRAM, SSDs can experience higher latency and reduced performance during sustained workloads or intensive multitasking. To address this limitation, Samsung plans to employ the NVMe Host Memory Buffer (HMB) feature, which allocates a portion of system memory over the PCIe interface for mapping metadata.

The drive is rated at 400 TBW endurance, indicating the likely use of QLC NAND flash, which trades durability for lower cost. Samsung has not publicly identified the exact NAND technology employed in this model.

Rising prices for both NAND flash and DRAM have prompted SSD manufacturers to seek cost‑saving measures. Removing the DRAM package reduces component expenses, simplifies PCB layout, and helps maintain competitive pricing in the mainstream market.

QLC technology increases storage density and lowers production costs but lags behind TLC, MLC, and SLC in sustained write performance and endurance. Nevertheless, the disclosed sequential read and write speeds of 7,150 MB/s and 6,450 MB/s place this drive in the same performance tier as many mainstream PCIe 4.0 SSDs that traditionally include dedicated DRAM caches.

Samsung has not yet announced pricing, availability, an official product name, or the specific NAND technology used. Until further details are released, the leaked specifications suggest a lower‑cost PCIe 4.0 SSD that balances acceptable performance with reduced manufacturing expenses amid rising memory prices.

Rising component costs are reshaping SSD design choices

Samsung’s move reflects a broader industry trend: as NAND flash and DRAM prices continue to climb sharply, vendors are exploring designs that minimize reliance on expensive components.

Removing the DRAM package not only cuts direct component costs but also simplifies board layout, reducing manufacturing complexity and enabling lower pricing for mainstream SSDs.

QLC NAND offers higher density and lower cost per gigabyte, yet it delivers weaker sustained write performance and shorter endurance compared to TLC, MLC, or SLC alternatives.

Despite these trade‑offs, the published sequential speeds of 7,150 MB/s for reads and 6,450 MB/s for writes position this drive alongside many mainstream PCIe 4.0 SSDs that typically incorporate dedicated DRAM caches.

Samsung has not disclosed the specific NAND technology used in this unannounced model.

Until Samsung provides official details on pricing, availability, product naming, and NAND technology, the leaked specifications point to a cost‑effective PCIe 4.0 SSD that aims to balance performance with reduced manufacturing expenses amid ongoing increases in memory prices.

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